Easy2Siksha Sample Paper
(GNDU) MOST REPETED (IMPORTANT) QUESTIONS
BCA 3
rd
SEMESTER
COMPUTER ARCHITECTURE
Repeated Quesons
1. Role / Phases of Instrucon Cycle (with Timing Signals)
• Frequency: 4 mes
• Years Appeared: 2021, 2022, 2023, 2024
2. Role and Use of Registers / Register Transfer Language (including Logical & Shi
Micro-operaons)
• Frequency: 4 mes
• Years Appeared: 2021, 2022, 2023, 2024
2025 Smart Predicon Table
Based on 4-Year Queson Paper Analysis
Queson Topic
Repeats
Years Appeared
Priority
Level
Instrucon Cycle & Timing Signals
4
2021, 2022, 2023,
2024
Very
High
Registers & Register Transfer Language
(Logical/Shi Ops)
4
2021, 2022, 2023,
2024
Very
High
Easy2Siksha Sample Paper
(GNDU) MOST REPETED (IMPORTANT) Answer
BCA 3
rd
SEMESTER
COMPUTER ARCHITECTURE
Solved Answer
1. Role / Phases of Instrucon Cycle (with Timing Signals)
• Frequency: 4 mes
• Years Appeared: 2021, 2022, 2023, 2024
Ans: A New Beginning: The Tale of the CPU’s Daily Routine
Imagine the CPU as a very disciplined chef in a high-tech kitchen. Every day, this chef follows
a strict recipe book (the program) and works in perfect rhythm with a kitchen clock (the
timing signals).
The chef’s job? Take one instruction at a time from the recipe, understand it, gather the
ingredients, cook it, and then get ready for the next one. This daily routine of the chef is
what we call the Instruction Cycle.
Why the Instruction Cycle Exists (The Role)
Before we dive into the phases, let’s understand why the instruction cycle is so important.
Think of the CPU as the brain of the computer. It doesn’t just randomly do things — it
follows a cycle so that:
1. Order is maintained – Instructions are executed in the correct sequence.
2. Efficiency is maximized – No time is wasted; as soon as one instruction finishes, the
next begins.
3. Coordination with other parts – Memory, input/output devices, and the CPU all
work in sync.
4. Predictability – Engineers can design systems knowing exactly what the CPU will do
next.
Without this cycle, the CPU would be like a chef who forgets steps, mixes recipes, and burns
the food — chaos.
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The Four Main Phases of the Instruction Cycle
The instruction cycle is like a four-act play. Each act has a clear purpose, and the timing
signals are like the stage manager, telling the actors when to speak and move.
Act 1: Fetch Phase – “Go Get the Recipe”
The CPU starts by fetching the instruction from memory.
• What happens here?
o The Program Counter (PC) holds the address of the next instruction.
o This address is sent to the Memory Address Register (MAR).
o The memory sends back the instruction to the Memory Data Register (MDR).
o The instruction is then placed into the Instruction Register (IR).
o The PC is incremented to point to the next instruction.
• Analogy: The chef looks at the recipe book, finds the next recipe, and copies it onto
the kitchen counter.
• Timing Signals Role:
o T0: Load the address from PC into MAR.
o T1: Send a read signal to memory.
o T2: Transfer the fetched instruction into IR.
Act 2: Decode Phase – “Understand the Recipe”
Now the CPU needs to figure out what the instruction means.
• What happens here?
o The Control Unit (CU) examines the opcode (operation code) in the IR.
o It decides what operation to perform and which operands are needed.
o If the instruction involves memory, the address part is separated.
• Analogy: The chef reads the recipe and understands whether it’s baking a cake,
boiling pasta, or chopping vegetables.
• Timing Signals Role:
o T3: Decode the opcode and prepare control signals for the next phase.
Act 3: Execute Phase – “Do the Cooking”
This is where the actual work happens.
• What happens here?
o If it’s an arithmetic operation, the ALU (Arithmetic Logic Unit) performs it.
o If it’s a data transfer, the CPU moves data between registers or between
memory and registers.
o If it’s an I/O operation, the CPU communicates with the device.
• Analogy: The chef now follows the recipe steps — mixing, heating, stirring — to
produce the dish.
• Timing Signals Role:
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o T4, T5, …: Depending on the complexity, multiple timing pulses may be
needed to complete the execution.
Act 4: Store Phase – “Serve the Dish”
The result of the execution is stored back into memory or a register.
• What happens here?
o If the result is to be saved in memory, the CPU sends it via the MDR to the
specified address in MAR.
o If it’s to be stored in a register, it’s placed directly there.
• Analogy: The chef plates the dish and places it on the serving table.
• Timing Signals Role:
o Tn: Write signal is sent to memory or the register file.
Timing Signals – The Invisible Conductor
Now, let’s talk about the Timing Signals in more detail.
Think of timing signals as the beats in a song. Every action in the CPU happens on a specific
beat. These beats are generated by the system clock.
• Machine Cycle: The complete set of beats needed to fetch, decode, execute, and
store one instruction.
• T-states (T0, T1, T2…): The smaller beats within each phase.
Why are they important?
• They ensure that data is ready before it’s used.
• They prevent two parts of the CPU from trying to use the same bus at the same time.
• They synchronize CPU operations with slower components like memory.
A Walkthrough Example
Let’s follow a simple instruction: ADD R1, R2 (Add the contents of R2 to R1)
1. Fetch:
o PC → MAR (T0)
o Memory read → MDR → IR (T1, T2)
o PC incremented
2. Decode:
o CU reads opcode “ADD” (T3)
o Identifies operands R1 and R2
3. Execute:
o ALU adds R1 + R2 (T4)
o Result stored in temporary register
4. Store:
o Result moved to R1 (T5)
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All of this happens in a few billionths of a second, perfectly timed.
The Role Summarized
The role of the instruction cycle is to:
• Provide a structured, repeatable process for executing instructions.
• Coordinate CPU, memory, and I/O operations.
• Ensure accuracy and efficiency.
• Allow pipelining and parallelism in advanced CPUs.
Why Examiners Love This Question
If you explain it like a story — with analogies, clear phases, and timing signal roles — you
show:
• Conceptual clarity (you understand the “why” and “how”)
• Technical accuracy (you know the registers, control signals, and phases)
• Communication skills (you can make complex things simple)
Final Story Recap
The CPU is our master chef. The instruction cycle is its daily cooking routine. The timing
signals are the kitchen clock ticks that keep everything in sync. Every instruction is a recipe
— fetched, understood, executed, and served — all in perfect rhythm.
2. Role and Use of Registers / Register Transfer Language (including Logical & Shi Micro-
operaons)
• Frequency: 4 mes
• Years Appeared: 2021, 2022, 2023, 2024
Ans: A Different Beginning: The CPU’s Secret Office
Picture the CPU not as a cold, lifeless chip, but as a bustling office inside your computer. In
this office, there’s a team of super-fast assistants who handle all the important documents
(data) before they go anywhere else. These assistants are called Registers.
They’re not like the big filing cabinets in the back room (main memory). They’re more like
the desk drawers right next to the boss — small, but lightning-fast to access. And just like in
any efficient office, there’s a special language the assistants use to pass documents around
— that’s the Register Transfer Language (RTL).
Part 1: The Role of Registers – The CPU’s Personal Assistants
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Registers are tiny storage locations inside the CPU. They hold data, addresses, instructions,
or control information temporarily while the CPU is working.
Why are they so important?
• Speed: Accessing main memory is like walking to the filing cabinet across the room.
Accessing a register is like grabbing a paper from your desk — instant.
• Coordination: They help the CPU keep track of what it’s doing — which instruction
it’s on, what data it’s working with, and where to store results.
• Specialization: Different registers have different jobs, just like assistants in an office.
Types of Registers and Their Jobs
Let’s meet the team:
1. Program Counter (PC) – The Scheduler Keeps track of the address of the next
instruction to execute.
2. Instruction Register (IR) – The Interpreter Holds the current instruction being
decoded and executed.
3. Memory Address Register (MAR) – The Navigator Stores the address in memory
where data or instructions will be fetched from or stored to.
4. Memory Data Register (MDR) – The Courier Temporarily holds the data moving
between memory and the CPU.
5. Accumulator (ACC) – The Calculator’s Clipboard Holds intermediate results of
arithmetic and logic operations.
6. General Purpose Registers (R0, R1, R2… etc.) – The All-Rounders Store temporary
data, variables, or intermediate results.
7. Status Register / Flag Register – The Reporter Keeps track of conditions like zero
result, carry, overflow, or negative result.
Part 2: Register Transfer Language (RTL) – The Office’s Secret Code
Now, imagine all these assistants passing documents to each other. They need a clear,
precise, and universal shorthand so there’s no confusion. That shorthand is Register
Transfer Language.
Definition: RTL is a symbolic notation used to describe the operations in which data is
transferred from one register to another, or between registers and memory, along with the
operations performed on the data.
Basic Syntax of RTL
• R1 ← R2 Means: Copy the contents of register R2 into register R1.
• R3 ← R1 + R2 Means: Add the contents of R1 and R2, store the result in R3.
• MAR ← PC Means: Load the address from the Program Counter into the Memory
Address Register.
Why RTL is Important
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• Clarity: Engineers can describe CPU operations without writing full machine code.
• Design: Helps in designing and understanding control logic.
• Documentation: Acts as a blueprint for how data moves inside the CPU.
Part 3: Logical Micro-operations – The CPU’s Thinking Tricks
Registers don’t just store and pass data — they can also manipulate it directly through
micro-operations.
Logical micro-operations are operations that work on the bits of data in registers without
considering them as numbers to be added or subtracted.
Common Logical Micro-operations
1. AND – Filtering Example: R1 ← R1 AND R2 Keeps only the bits that are 1 in both
registers.
2. OR – Combining Example: R1 ← R1 OR R2 Sets bits to 1 if they are 1 in either
register.
3. XOR – Difference Detector Example: R1 ← R1 XOR R2 Sets bits to 1 if they are
different in the two registers.
4. NOT / Complement – Flipping Example: R1 ← NOT R1 Changes 1s to 0s and 0s to 1s.
Analogy: Logical micro-operations are like the office assistants using highlighters, erasers, or
sticky notes to mark up a document before passing it on.
Part 4: Shift Micro-operations – The CPU’s Rearranging Tricks
Sometimes, the CPU needs to move bits around inside a register. This is where shift micro-
operations come in.
Types of Shifts
1. Logical Shift Left (LSL) Moves all bits to the left, fills the rightmost bit with 0.
Effectively multiplies unsigned numbers by 2.
2. Logical Shift Right (LSR) Moves all bits to the right, fills the leftmost bit with 0.
Effectively divides unsigned numbers by 2.
3. Arithmetic Shift Left (ASL) Same as logical shift left, but for signed numbers.
4. Arithmetic Shift Right (ASR) Moves bits to the right, but keeps the sign bit
unchanged.
5. Circular Shift (Rotate) Bits shifted out on one end are brought back in on the other
end.
Analogy: Shift operations are like rearranging chairs in a meeting room — moving everyone
one seat to the left or right, sometimes keeping the leader (sign bit) in place.
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Part 5: How It All Comes Together
Let’s walk through a mini-story of an instruction using registers, RTL, logical, and shift micro-
operations.
Instruction: Multiply the value in R1 by 2, then AND it with the value in R2, and store the
result in R3.
Step-by-step:
1. Shift Operation: R1 ← LSL R1 (Multiply by 2 by shifting bits left)
2. Logical Operation: R3 ← R1 AND R2 (Keep only the bits that are 1 in both)
3. Result: R3 now holds the processed value.
Final Recap in Story Form
Inside the CPU’s secret office:
• Registers are the super-fast assistants.
• RTL is their secret shorthand for passing and processing data.
• Logical micro-operations are their editing tools for fine-tuning data.
• Shift micro-operations are their rearranging skills for moving bits around.
Together, they keep the CPU running like a perfectly timed, well-organized office — where
every document (data) is in the right place, at the right time, in the right form.
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